Iowa State University
Fall 2007
COURSE INFORMATION
Meeting: MW 2:10-3:25PM, Howe 1324
Instructor: Zhao Zhang
Office Hours: MW 3:30-4:30PM or by appointment
Office Hours Location: 368 Durham
Contacts: phone 294-7940, e-mail: zzhang@iastate.edu
WebCT: All on-line course
materials are put on WebCT.
Number of Credits: 3
Prerequisite: CprE 305 Computer Organization and Design or an
equivalent course
COURSE DESCRIPTION
Quantitative principles of computer architecture design, instruction set design, processor architecture: pipelining and superscalar design, instruction level parallelism, memory organization: cache and virtual memory systems, multiprocessor architecture, cache coherency, interconnection networks and message routing, I/O devices and peripherals.
TEXTBOOK
J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 4th edition, Morgan Kaufmann Publishers, Inc., 2006.
REFERENCES
COURSE OUTLINE
HOMEWORK ASSIGNMENTS
There will be seven to ten homework assignments. Most problems will fall into one of the following categories:
REPORT AND PRESENTATION
Write a survey report on a research topic. A list of suggested
topics will be given. On-campus students may work in groups of two
members and must give a presentation. Off-campus students may work
individually but do not need to give a presentation.
EXAM
There will be two exams, mid-term exam and final exam.
CLASS PARTICIPATION
On campus students are expected to attend class meetings and to participate the discussions. Off campus students are expected to participate discussions on class bulletins. Class bulletins are hosted on WebCT.
GRADING
Students with Disabilities: If you have a disability requiring accommodation in this class, please notify the instructor at the beginning of the semester.